Lecture Notes || SNS Courseware

Subject Details

Dept : ECE

Sem : 5

Regul : r 2019

Faculty : Mr.J.Prabakaran

phone : 9551144859

E-mail : prabakaran.j.ece@snsct.org

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Lecture Notes

UNIT 1:

Stick diagram

CV characteristics

CMOS inverter –DC characteristics

Non-ideal IV effects

MOS transistor theory , IV characteristics,

Twin-tub process

n-well process

CMOS fabrication- p-well process

UNIT 2:

Examples of Combinational Logic Design

Pass transistor Logic & Transmission gates

Pseudo NMOS logic

Static CMOS design

Power dissipation

Low power design principles

UNIT 3:

Low power memory circuits

Clock strategies

Pipelines

Timing issues

Static and Dynamic Latches and Registers

Synchronous design.

UNIT 4:

BIST

Design strategies for test

Manufacturing test principles

VLSI testing

Chip level and system level test techniques

UNIT 5:

Procedural assignments conditional statements

Operators and timing controls

Basic concepts, identifiers-

Gate primitives & gate delays

Design hierarchies

Test benche Examples: decoder, equality detector, comparator

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