EC8392 Digital Electronics
Change Subject
19MA301-Transforms and Partial Differential Equations
19EE308-Electrical Engineering &Instrumentation
19EC303-Linear and Digital Circuits (Class A)
19ec304-Electronic Circuits I (Class A)
Home
Syllabus
Lecture notes
Puzzles
Resourselink
Assignments
Grades & Toppers
Youtube videos
Question Bank
Menu
455
Page views
46
Files
8
Videos
6
R.Links
Lecture Notes
UNIT 1:
Karnaugh map Minimization
LOGIC GATES METHODS
DIGITAL FUNDAMENTALS
ARITHMETIC OPERATIONS
Quine-McCluskey method of minimization
Boolean theorems
SOP & POS
Excess 3, Gray, Alphanumeric codes,
Boolean theorems
UNIT 2:
Half and Full Subtractors
Design of Half and Full Adders
Binary Parallel Adder
Carry look ahead Adder
BCD Adder
Multiplexer, Demultiplexer
Decoder, Encoder
Magnitude Comparator
UNIT 3:
Flip flops – SR, JK, T, D
FF – operation and excitation tables, Triggering of FF
Analysis and design of clocked sequential circuits
state assignment, circuit implementation
Shift registers, Universal Shift Register.
Ring Counters
Design of Counters- Ripple Counters
UNIT 5:
Basic memory structure &Types
Static and dynamic RAM
Programmable Logic Devices – Programmable Logic Array (PLA) - Programmable Array Logic (PAL)
Implementation of combinational logic circuits
Field Programmable Gate Arrays (FPGA)
ECL, CMOS
Announcements
Recent Files
29
Sep
Flip flops – SR, JK, T, D
29
Sep
FF – operation and excitation tables, Triggering of FF
29
Sep
Analysis and design of clocked sequential circuits
29
Sep
state assignment, circuit implementation
29
Sep
Shift registers, Universal Shift Register.
29
Sep
Ring Counters
X
SNS COLLEGE OF ENGINEERING
ADMIN DEPARTMENT
erp.snsct.snsce@gmail.com
9944177100