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Lecture Notes

UNIT 1:
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Karnaugh map Minimization
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LOGIC GATES METHODS
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DIGITAL FUNDAMENTALS
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ARITHMETIC OPERATIONS
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Quine-McCluskey method of minimization
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Boolean theorems
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SOP & POS
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Excess 3, Gray, Alphanumeric codes,
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Boolean theorems
UNIT 2:
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Half and Full Subtractors
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Design of Half and Full Adders
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Binary Parallel Adder
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Carry look ahead Adder
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BCD Adder
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Multiplexer, Demultiplexer
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Decoder, Encoder
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Magnitude Comparator
UNIT 3:
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Flip flops – SR, JK, T, D
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FF – operation and excitation tables, Triggering of FF
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Analysis and design of clocked sequential circuits
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state assignment, circuit implementation
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Shift registers, Universal Shift Register.
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Ring Counters
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Design of Counters- Ripple Counters
UNIT 5:
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Basic memory structure &Types
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Static and dynamic RAM
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Programmable Logic Devices – Programmable Logic Array (PLA) - Programmable Array Logic (PAL)
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Implementation of combinational logic circuits
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Field Programmable Gate Arrays (FPGA)
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ECL, CMOS