Subject Details
Dept     : CSE
Sem      : 3
Regul    : 2019
Faculty : K.Suriya
phone  : NIL
E-mail  : suriya.k.ece@snsct.org
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  • Lecture Notes

    Dear Students the Lecture Notes has been uploaded for the following topics:
    Demorgan’s theorem - Principle of Duality, Boolean expression.,
    Minimization of Boolean expression -Minterms and Maxterm, SOP – POS,
    Karnaugh Map Minimization,
    Don’t Care Conditions,
    Tabulation Method,
    Logic Gates,
    Implementation of Logic functions using Gates,
    NAND - NOR Implementation

  • Youtube Video

    Dear Students the Youtube Video has been uploaded for the following topics:
    Introduction to Digital Electronics
    Logic Gates Animation
    Simple Projects
    Project Ideas

  • Question Bank

    Dear Students the Question Bank has been uploaded for the following topics:
    All

  • Resource Link

    Dear Students the Resource Link has been uploaded for the following topics:
    Verification and interpretation of truth table for AND, OR, NOT, NAND, NOR, Ex-OR, Ex-NOR gates
    Construction of half and full adder using XOR and NAND gates and verification of its operation
    To Study and Verify Half and Full Subtractor
    Realization of logic functions with the help of Universal Gates (NAND, NOR)
    Verify the truth table of RS, JK, T and D flip-flops using NAND and NOR gates
    Implementation and verification of decoder or de-multiplexer and encoder using logic gates
    Design and Verify the 4-Bit Serial In - Parallel Out Shift Registers
    Implementation of 4x1 multiplexer and 1x4 demultiplexer using logic gates
    Design and verify the 4- Bit Synchronous or Asynchronous Counter using JK Flip Flop
    Verify Binary to Gray and Gray to Binary conversion using NAND gates only
    Verify the truth table of one bit and two bit comparator using logic gates

  • Lecture Notes

    Dear Students the Lecture Notes has been uploaded for the following topics:
    Number Systems,
    Boolean Postulates and laws,
    Carry Look Ahead Adder, Serial Adder/ Subtractor,
    Design Procedure - Half Adder - Full Adder,
    Half Subtractor - Full Subtractor,
    Parallel Binary Adder & Subtractor, Fast Adder,
    BCD Adder, Binary Multiplier,
    Multiplexer & Demultiplexer, Encoder & Decoder,
    Parity Checker and Generator,
    Code Converters (Binary to Gray, Gray to Binary),
    Magnitude Comparator (2-bit),
    Design thinking approach of Edge triggered Flip flops: SR, JK - Characteristic table and equation, Application table,
    Latches (SR, Clocked SR),
    Edge triggered Flip flops: T, D, Master Slave - Characteristic table and equation, Application table,
    Design of synchronous counters,
    Up/down counter,
    Modulo–n counter,
    Decade counters,
    Synchronous Counters

  • Lecture Notes

    Dear Students the Lecture Notes has been uploaded for the following topics:
    Register, Shift registers,
    Register, Shift registers,
    Universal shift register,
    Ring counters,
    Classification of sequential circuits: Moore and Mealy,
    Design of synchronous sequential circuits: State minimization, State assignment,
    Introduction to Hazards: Static, Dynamic

  • Lecture Notes

    Dear Students the Lecture Notes has been uploaded for the following topics:
    Memories: ROM, PROM,
    EEPROM, RAM,
    Programmable Logic Devices: Programmable Logic Array (PLA),
    Implementation of combinational logic using PROM, PLA, PAL,
    Digital logic families: TTL,
    ECL and CMOS

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