Subject Details
Dept     : AIML
Sem      : 3
Regul    : 2019
Faculty : R.vijayakumar
phone  : NIL
E-mail  : vijaypse.r.eee@snsct.org
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Reference videos
Minimization Techniques: Number systems
Boolean postulates and laws, De-Morgan’s Theorem
Principle of Duality & Boolean expression
Minimization of Boolean expressions
Minterm, Maxterm, Sum of Products (SOP) & Product of Sums (POS)
Karnaugh map Minimization, Don’t care conditions
Tabulation method. Logic Gates: AND, OR, NOT
NAND, NOR gate
Exclusive–OR and Exclusive–NOR
Implementations of Logic Functions using gates, NAND–NOR implementations
Design procedure
Half adder – Full Adder
Half subtractor – Full subtractor
Parallel binary adder, parallel binary Subtractor
Fast Adder - Carry Look Ahead adder
Serial Adder/Subtractor - BCD adder
Binary Multiplier –Multiplexer/ Demultiplexer
Decoder - Encoder – parity checker & parity generators
Code converters - Magnitude Comparator
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