CMOS fabrication - p-well process, n-well process, twin-tub process,MOS transistor theory-IVcharacteristics, CV characteristics, Non-ideal IV effects,CMOS inverter -DC characteristics, Stickdiagram , Layout diagrams.
Examples of Combinational Logic Design, Pass transistor Logic, Transmission gates, Pseudo NMOS logic- static and dynamic CMOS design, Domino Logic, Power dissipation, Low power design principles.
Static and Dynamic Latches and Registers, Timing issues, pipelines, clock strategies, Low power memory circuits, Synchronous and Asynchronous design.
VLSI testing -need for testing, manufacturing test principles, design strategies for test, Design for testability- BIST-chip level and system level test techniques.
Basic concepts- identifiers- gate primitives, gate delays, operators, timing controls, procedural assignments conditional statements, Design hierarchies, Behavioral and RTL modeling, Test benches, Examples: decoder, equality detector, comparator, priority encoder, full adder, Ripple carry adder and D flip flop.
Reference Book:
1. N.Weste, K.Eshraghian, “Principles of CMOS VLSI Design”, Second Edition, Addision Wesley 1993 [Unit I-III]. 2. R.Jacob Baker, Harry W.LI., David E.Boyee, “CMOS Circuit Design, Layout and Simulation”, Prentice Hall of India 2005 [Unit IV-V]. 3. A.Pucknell, Kamran Eshraghian, “Basic VLSI Design”, Third Edition, Prentice Hall of India, 2007 [Unit I-IV]. 4. Neil H. E. Weste and David Harris: “CMOS VLSI DESIGN”, Third edition, Pearson Education, 2005. [Unit IV]. 5. Uyemura J.P: “Introduction to VLSI circuits and systems”, Wiley 2002. [Unit I-II]
Text Book:
1.Jan Rabaey, AnanthaChandrakasan, B.Nikolic, “Digital Integrated Circuits: A Design Perspective”, Second Edition, Prentice Hall of India, 2003 [Unit I-IV]. 2. M.J. Smith, “Application Specific Integrated Circuits”, Addisson Wesley, 1997 [Unit II-V].
