Lecture Notes || SNS Courseware

Lecture Notes

UNIT 1:

MOS Transistor, CMOS logic, Inverter,

Pass Transistor, Transmission gate,

Layout Design Rules, Gate Layouts,

Long-Channel I-V Charters tics,

C-V Charters tics, Non ideal I-V Effects

DC Transfer characteristics, RC Delay Model,

Elmore Delay, Linear Delay Model

Logical effort, Parasitic Delay

Delay in Logic Gate, Scaling

UNIT 2:

static cmos

Ratioed circuits

CVSL

Dynamic circuit

Static and Dynamic Power

low power architecture

CPL

pass transistor logic

Domino logic

UNIT 3:

Static latches

Pulse registers

Schmitt trigger

Dynamic latches

Pipelining

Timing classification of digital system

Synchronous design

Astable sequential circuit

Monostable sequential circuit

UNIT 4:

Memory architectures

ALU

Adder

Data path

Shifters

Memory peripheral circuitry

Memory core

power and speed tradeoff

Multiplier

UNIT 5:

FPGA building block architecture

FPGA interconnect

BIST

IDDQ testing

Boundary scan

Scan design

Ad Hoc testing

Scan design

Design for manufacturability

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